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PAM3103
300mA Adjustable High PSRR CMOS Linear Regulator Features
n Low Dropout Voltage: 180mV@ 300mA ( V O= 3.3V) n Accuracy within 2% n Quiescent Current: 65 A Typ. n High PSRR: 67dB@100Hz n Excellent Line/Load Regulation n Fast Response n Current Limiting n Short Circuit Protection n Low Temperature Coefficient n Shutdown Current: 0.5 A n Thermal Shutdown n Space Saving Packages SOT2 3-5 and SC70-5 n Pb-Free Package
General Description
The PAM3103 is a positive, adjustable linear regulator. It features low quiescent current (65 A Typ.) and low dropout voltage, making it ideal for battery powered applications. The output voltage is adjustable from 1.2V through 5V. Its high PSRR makes it useful in applications that require AC noise suppression on the input power supply. Space-saving SOT23-5 and SC70-5 packages are attractive for portable and handheld applications. It has both thermal shutdown and a current limit features to prevent device failure under extreme operating conditions. It is stable with an output capacitor of 2.2 F or greater.
Applications
n n n n n n n
Cordless Phone Cellular Phone Bluetooth Earphone Digital Camera Portable Electronics WLAN M P 3 Player
Typical Application
IN
1 5
Block Diagram
VIN
OUT
VOUT
VIN EN GND 2
VOUT
PAM3103
3 ADJ 4
R1
CC
100pF
OverCurrent Shutdown
C IN 1F
R2
CO 2.2 F
EN
Thermal Protection ADJ
Error Amp
V O= V REF* ( R1 + R2 ) /R2
Reference
GND
Power Analog Microelectronics , Inc
www.poweranalog.com 09/2008 Rev 1.2
1
PAM3103
300mA Adjustable High PSRR CMOS Linear Regulator Pin Configuration & Marking Information
Top View SOT23-5 5 4 5 4 Top View SC70-5
ACVYW
1 1 2 3
ACVYW
2 3
AC: V: Y: W:
Product Code of PAM3101 Voltage Code Year Week
Pin Number 1 2 3 4 5
Name VIN GND EN ADJ VOUT
Function Input Ground Chip Enable (Active High) Adjustable Pin Output
Absolute Maximum Ratings
These are stress ratings only and functional operation is not implied . Exposure to absolute maximum ratings for prolonged time periods may affect device reliability . All voltages are with respect to ground . Input Voltage ............................................... 6.6V Output Current ......................................... 300mA Output Pin Voltage ................ GND-0.3 to V IN+0.3V Lead Soldering Temperature(5sec) ............ 300C Storage Temperature ....................- 65 C to 150 C
Recommended Operating Conditions
Max. Supply Voltage (for Max. duration of 30 minutes)................................................6.4V Junction Temperature ..................- 40 C to 125 C Ambient Temperature .....................- 40 C to 85 C
Thermal Information
Parameter Thermal Resistance (Junction to Case) Thermal Resistance (Junction to Ambient) Internal Power Dissipation Symbol JC JA PD Package SOT23-5 SC70-5 SOT23-5 SC70-5 SOT23-5 SC70-5 Maximum 130 TBD 250 300 400 300 Unit C/W C/W mW
Power Analog Microelectronics , Inc
www.poweranalog.com 09/2008 Rev 1.2
2
PAM3103
300mA Adjustable High PSRR CMOS Linear Regulator Electrical Characteristic
PARAMETER Input Voltage Output Voltage Reference Voltage Output Voltage Accuracy Output Current Short Circuit Current Dropout Voltage Ground Current Quiescent Current Line Regulation Load Regulation Temperature Coefficient Over Temperature Shutdown Over Temperature Hysteresis Power Supply Ripple Rejection Output Noise EN Input High Threshold EN Input Low Threshold Shutdown Current
T A= 25 C, V IN= 4V, V O=3V, C IN= 1 F, C O= 2.2 F, unless otherwise noted.
SYMBOL V IN VO VREF VO IO ISC Vdrop IGND IQ LNR LDR Tc OTS OTH IO=1mA IO=1mA f=100Hz PSRR Vn V IH V IL ISD Io=100mA, Vo=1.2V f =10Hz to 100kHz V IN =2.5V to 5V V IN =2.5V to 5V V EN=0V 0.01 1.5 0.3 1 f=1kHz f=10kHz Vo=0V IO =300mA 2.5VVo<3.3V Vo3.3V IO=1mA -2 300 150 370 180 70 65 -0.4 -1 0.2 0.2 40 150 30 67 65 42 50 450 230 90 90 0.4 1 A A %/V % ppm/ C
O O
Test Conditions
MIN Note 1 1.2
TYP
MAX 5.5 5
UNITS V V V % mA mA mV
1.235 2 Note 2
IO=1mA to 300mA IO=0mA IO=1mA, V IN =3Vto 5V IO=1mA to 300mA
C C
O
dB dB dB Vrms V V A
Note1: The minimum input voltage ( V IN(MIN)) of the PAM3103 is determined by output voltage and dropout voltage. The minimum input voltage is defined as : V IN(MIN)=V O+V drop Note 2: Output current is limited by P D, maximum I O=P D/( V IN(MAX)-V O).
Power Analog Microelectronics , Inc
www.poweranalog.com 09/2008 Rev 1.2
3
PAM3103
300mA Adjustable High PSRR CMOS Linear Regulator Typical Performance Characteristics
1. Output Voltage vs Input Voltage T A= 25 C, V O=1.2V, C IN= 1 F, C O= 2.2 F, unless otherwise noted. 2. Output Voltage vs Output Current
VIN=3V
1.25 1.2
1.205 1.2
Output Voltage (V)
Output Voltage(V)
1.15 1.1 1.05 1 0.95 0.9 0.85 0.8 2 3 4 Input Voltage(V) 5 6
IO=1mA IO=150mA IO=300mA
1.195 1.19 1.185 1.18 1.175 0 50 100 150 200 250 300 Output Current(mA)
VIN=4V VIN=5V
3. Output Voltage vs Temperature
1.2 1.195
80 70
4. Quiescent Current vs Input Voltage
Output Voltage(V)
1.185 1.18 1.175 1.17 1.165 1.16 0 50
IO=30mA
Input Voltage(V)
1.19
60 50 40 30 20 10 0 2 3 4 5 Quiescent Current (A) 6
IO=300mA
100
150
Temperature()
82
Ground Current (A)
5. Ground Current vs Temperature
Ground Current (A)
120 100 80 60
6. Ground Current vs Input Voltage
IO=300mA
80 78 76 74 72 70 68 0 30 60 90 120 150 Temperature()
IO=150mA
40 20 0 2 3 4 Input Voltage(V)
IO=1mA
5
6
Power Analog Microelectronics , Inc
www.poweranalog.com 09/2008 Rev 1.2
4
PAM3103
300mA Adjustable High PSRR CMOS Linear Regulator
Typical Performance Characteristics(continued)
7. Load Regulation Transient Response 8. Line Regulation Transient Response
Vo AC Coupling
V IN DC Coupling
Io DC Coupling
Vo AC Coupling
I O=1mA to 100mA
+0 -10
Io=1mA,V IN=3V to 5V 9. Power Supply Ripple Rejection
Vo AC Coupling
d B
-20 -30 -40 -50
I O=100mA
Io DC Coupling
I O=1mA
-60 -70 -80 10
20
50
100
200
500
1k Hz
2k
5k
10k
20k
50k100k
I O=1mA to 300mA
V IN=3V,Vpp=1V
Vo AC Coupling
Io DC Coupling
I O=100mA to 300mA
Power Analog Microelectronics , Inc
www.poweranalog.com 09/2008 Rev 1.2
5
PAM3103
300mA Adjustable High PSRR CMOS Linear Regulator Application Information
Capacitor Selection and Regulator Stability Similar to any low dropout regulator, the external capacitors used with the PAM3103 must be carefully selected for regulator stability and performance. A capacitor C IN of more than 1F can be employed in the input pin, while there is no upper limit for the capacitance of C IN. Please note that the distance between C IN and the input pin of the PAM3103 should not exceed 0.5 inch. Ceramic capacitors are suitable for the PAM3103. Capacitors with larger values and lower ESR (equivalent series resistance) provide better PSRR and line-transient response. The PAM3103 is designed specifically to work with low ESR ceramic output capacitors in order to save space and improve performance. Using an output ceramic capacitor whose value is > 2.2F with ESR>5m ensures stability. ADJ Output Voltage Programming The output voltage of the PAM3103 adjustable regulator is programed by using an external resistor divider as shown in Figure1. The output voltage is calculated as below: V O=V REF(1+R1/R2) Input-Output (Dropout) Voltage Resistor R1 and R2 should be chosen for approximately 7 A divider current. Lower value resistors can be used but offer no advantage and waste more power. Higher value should be avoided as leakage current at ADJ pin increase the output voltage error. C C is unnecessary when R1 or R2 <20k . The recommended design procedure is to choose R2=169k to set the divider current at 7 A and then calculate R1 as below: R1=( V O/V REF - 1 )R2 A regulator's minimum input-output voltage differential (or dropout voltage) determines the lowest usable supply voltage. The PAM3103 has a typical 300mV dropout voltage. In batterypowered systems, this will determine the useful end-of-life battery voltage. Current Limit and Short Circuit Protection The PAM3103 features a current limit, which monitors and controls the gate voltage of the pass transistor. The output current can be limited to 400mA by regulating the gate voltage. The PAM3103 also has a built-in short circuit current limit. Load Transient Considerations C u r v e 7 o f t h e PA M 3 1 0 3 l o a d - t r a n s i e n t response on page 5 shows two components of the output response: a DC shift from the output impedance due to the load current change and transient response. The DC shift is quite small due to excellent load regulation of the PAM3103. The transient spike, resulting from a step change in the load current from 1mA to 300mA, is 20mV. The ESR of the output capacitor is critical to the transient spike. A larger capacitance along with smaller ESR results in a smaller spike. Shutdown Input Operation The PAM3103 can be shut down by pulling the EN input low, and turned on by tying the EN input to VIN or leaving the EN input floating. Internal P-Channel Pass Transistor The PAM3103 features a 0.75 P-Channel MOSFET device as a pass transistor. The PMOS pass transistor enables the PAM3103 to consume only 65 A of ground current during low dropout, light-load, or heavy-load operation. This feature increases the battery operation life time.
Power Analog Microelectronics , Inc
www.poweranalog.com 09/2008 Rev 1.2
6
PAM3103
300mA Adjustable High PSRR CMOS Linear Regulator
Thermal considerations Thermal protection limits power dissipation in the PA M 3 1 0 3 . W h e n t h e j u n c t i o n t e m p e r a t u r e exceeds 150C, the OTP (Over Temperature Protection) starts the thermal shutdown and turns the pass transistor off. The pass transistor resumes operation after the junction temperature drops below 120C. For continuous operation, the junction temperature should be maintained below 125C. The power dissipation is defined as below: P D= (V IN-V OUT)*I O+V IN*I GND The maximum power dissipation depends on the thermal resistance of IC package, PCB layout, the rate of surrounding airflow and temperature difference between junction and ambient. The maximum power dissipation can be calculated by the following formula: P D(MAX) = (T J(MAX)-T A)/ JA Where T J(MAX) is the maximum allowable junction temperature 125C, T A is the ambient temperature and JA is the thermal resistance from the junction to the ambient. For example, as JA is 250C/W for the SOT-23 package based on the standard JEDEC 51-3 for a single-layer thermal test board, the maximum power dissipation at T A=25C can be calculated by following formula: P D(MAX)= (125C-25C)/250=0.4W It is also useful to calculate the junction temperature of the PAM3103 under a set of specific conditions. Suppose the input voltage V IN=3.3V, the output current I O=300mA and the case temperature T A =40C measured by a thermal couple during operation, the power dissipation is defined as: P D=(3.3V-2.8V)*300mA+3.3V*70uA150mW And the junction temperature T J can b e calculated as follows: T J = T A+P D* JA T J = 40C+0.15W*250C/W =40C+37.5C =77.5CPower Analog Microelectronics , Inc
www.poweranalog.com 09/2008 Rev 1.2
7
PAM3103
300mA Adjustable High PSRR CMOS Linear Regulator Ordering Information
PAM3103 X X X XXX
Output Voltage Number of Pins Package Type Pin Configuration
Pin Configuration A Type 1. VIN 2. GND 3. EN 4. ADJ 5. VOUT Package Type A: SOT-23 U: SC70 Number of Pins B: 5 Output Voltage ADJ
Part Number PAM3103AABADJ PAM3103AUBADJ
Output Voltage ADJ ADJ
Marking ACAYW ACAYW
Package Type SOT23-5 SC70-5
Standard Package 3,000Units/Tape&Reel 3,000Units/Tape&Reel
Power Analog Microelectronics , Inc
www.poweranalog.com 09/2008 Rev 1.2
8
PAM3103
300mA Adjustable High PSRR CMOS Linear Regulator Outline Dimension
c (REF.) 0.25
L REF. L1 (REF.)
SOT23-5
D e1
E1
E
REF. A A1 A2 c D E E1 L L1 b e e1
Min 0 0.70 2.70 2.60 1.40
0 0.30
Millimeter Nom 1.10MAX 0.05 1.00 0.12REF. 2.90 2.80 1.60 0.45REF. 0.60REF. 5 0.40 0.95REF. 1.90REF.
A1
A2
A
Max 0.10 1.295 3.10 3.00 1.80
10 0.50
Power Analog Microelectronics , Inc
www.poweranalog.com 09/2008 Rev 1.2
9
PAM3103
300mA Adjustable High PSRR CMOS Linear Regulator Outline Dimension
SC70-5
Power Analog Microelectronics , Inc
www.poweranalog.com 09/2008 Rev 1.2
10

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